Rust 96 🦀 Inline Assembly (asm!) for Architecture-Specific Optimization
Rust’s asm! macro is the language’s escape hatch into the raw instruction set of the machine. It exists because some operations cannot be expressed in portable Rust, and some optimizations require control that even LLVM’s best efforts cannot provide. This chapter is about using that escape hatch responsibly: writing inline assembly that is correct, that cooperates with the compiler’s register allocator, and that actually makes code faster rather than slower.
The chapter covers the mechanics of the asm! macro—templates, operands, register classes, and clobbers—before moving into the harder question of when inline assembly is worth the cost. It then explores the architecture-specific patterns that Rust programs reach for in practice: constant-time primitives, CPU feature detection, and tight numeric loops. The final sections address the discipline required to keep assembly from becoming a maintenance liability.
Key point: Inline assembly is opaque to the optimizer. That opacity is both its power and its danger—the compiler cannot rewrite your instructions, but it also cannot save you from getting the constraints wrong.
Why inline assembly exists
The portability ceiling. Rust’s standard library and core abstractions cover an enormous range of hardware, but they stop at the boundary of instructions that have no portable equivalent. Reading the CPU’s timestamp counter, issuing a cpuid query, or executing a memory fence with specific ordering semantics requires stepping outside the language. Inline assembly is the sanctioned mechanism for crossing that boundary without linking to a C library or writing a separate assembly file.
The optimizer’s blind spots. Compilers are conservative with certain patterns because they cannot prove that aggressive transformations are safe. A constant-time comparison written in pure Rust may be recognized as a branchless select and then transformed back into a branch by an optimizer that sees a performance opportunity. Inline assembly blocks this transformation entirely. The compiler treats the asm! body as a black box, which means patterns that must remain branchless stay branchless .
Register-level control. Some algorithms benefit from keeping values in specific registers across a sequence of operations, or from using SIMD registers in ways that the compiler’s auto-vectorizer does not choose. Explicit register operands allow the programmer to pin a value to eax or xmm0 and reason about the instruction stream directly. This is rarely necessary, but when it is necessary, there is no substitute.
The measurement problem. Inline assembly makes performance work empirical rather than theoretical. A loop that looks like it should be faster in assembly may be slower because it breaks a dependency chain the compiler was already exploiting, or because the assembly version prevents the compiler from scheduling loads ahead of time. Real-world Rust performance work has shown that moving a loop into assembly can make a kernel 25% faster in one case and 9% slower in another, depending entirely on whether the loop’s addressing mode matches the hardware’s strengths . Inline assembly forces the programmer to measure.
The safety cost. Every asm! block is an unsafe operation. The compiler cannot verify that the assembly does not write to memory it does not own, does not violate the ABI, or does not leave registers in a state that breaks the surrounding code. This is not a flaw in the design; it is the nature of the abstraction. The unsafe keyword is honest about what is happening: the programmer is taking responsibility for correctness at a level below what Rust can check.
The architecture lock-in. Inline assembly is inherently non-portable. An asm! block written for x86-64 will not compile on AArch64, and even within an architecture, register names and instruction syntax vary. This means that inline assembly in a library must be gated behind #[cfg(target_arch)] and accompanied by a portable fallback. The cost of maintaining that dual path is real, and it is the primary reason inline assembly should be a last resort rather than a first tool.
a. The asm! macro syntax
The asm! macro takes a template string followed by operand declarations. The template contains the assembly instructions, with placeholders for operands using the same syntax as Rust’s format strings: {} for positional arguments and {name} for named arguments . The operand list follows the template, separated by commas, and each operand declares its direction, register constraint, and the Rust expression it binds to.
use std::arch::asm;
// A minimal asm block: no operands, no outputs.
// The "nop" instruction does nothing, but it exercises the macro.
unsafe {
asm!("nop");
}The operand syntax has five primary forms. in(reg) declares an input: the compiler allocates a register and loads the value before the assembly runs. out(reg) declares an output: the compiler allocates a register and stores its value to the bound variable after the assembly runs. inout(reg) combines both: the same register holds the input value at the start and the output value at the end. The lateout and inlateout variants tell the compiler that the output register is not written until after all inputs have been read, which allows the register allocator to reuse an input register for the output .
// inout with a single expression: x is read, modified, and written back.
let mut x: u64 = 3;
unsafe {
asm!("add {0}, 5", inout(reg) x);
}
assert_eq!(x, 8);
// inout with separate input and output expressions: read from x, write to y.
let x: u64 = 3;
let y: u64;
unsafe {
asm!("add {0}, 5", inout(reg) x => y);
}
assert_eq!(y, 8);The distinction between inout and inlateout matters under optimization. The compiler may allocate the same register to an input and an inlateout output if it knows the input’s value is dead after the assembly’s first instruction. This saves a register, but it also means that writing to the output before reading the input corrupts the input. The following example fails in release mode because the compiler assigns the same register to b and the inlateout operand, and the first add overwrites b before the second add reads it .
// DANGER: inlateout allows the compiler to alias a and b's register.
// In release mode, this can produce 16 instead of 12.
let mut a: u64 = 4;
let b: u64 = 2;
let c: u64 = 3;
unsafe {
asm!(
"add {0}, {2}", // writes to a (inlateout) before reading c
inlateout(reg) a, // output can share a register with an input
in(reg) b,
in(reg) c,
);
}
// a may be 12 (correct) or 16 (corrupted) depending on register allocation.The safe version uses inout, which guarantees a dedicated register for a that cannot alias any input .
b. Register classes and explicit registers
The reg constraint is a register class: the compiler chooses any general-purpose register that fits the operand’s type. This is the right default because it gives the register allocator maximum freedom. But some instructions require specific registers, and Rust exposes those through explicit register constraints written as string literals.
// The x86-64 "out" instruction writes to an I/O port.
// It requires the value to be in eax.
let cmd: u8 = 0xd1;
unsafe {
asm!("out 0x64, al", in("al") cmd);
}Explicit registers treat aliases and sub-registers as equivalent. On x86-64, eax and rax refer to the same register at different widths, and using both in the same asm! block for different operands is a compile-time error . This prevents the class of bugs where two operands silently share a register because the programmer referred to it by different names.
The cpuid instruction is a common case for explicit registers because it hardcodes its outputs to eax, ebx, ecx, and edx. The following example reads the CPU manufacturer ID string. Note the out("ecx") _ and out("edx") _ declarations: the underscore tells the compiler that the register is modified but the value is discarded, which is how clobbers are expressed in the operand syntax .
let mut name_buf = [0_u8; 12];
unsafe {
asm!(
"mov {0}, ebx", // save ebx (reserved by LLVM on some targets)
"mov [rdi + 0], ebx", // manufacturer ID bytes go to ebx, edx, ecx
"mov [rdi + 4], edx",
"mov [rdi + 8], ecx",
"mov ebx, {0}", // restore ebx
out(reg) _, // scratch register for saving ebx
in("rdi") name_buf.as_mut_ptr(),
inout("eax") 0 => _, // select cpuid leaf 0, discard eax output
out("ecx") _, // cpuid clobbers ecx
out("edx") _, // cpuid clobbers edx
);
}The ebx handling deserves attention. On some x86-64 targets, LLVM reserves ebx and assumes it has full control over the register. Using it as a general reg operand would be dangerous because the compiler might assign it to another operand. The workaround is to save ebx to a scratch register, perform the cpuid, and restore it before the block ends. This is the kind of detail that makes inline assembly a specialized tool: it requires understanding both the instruction set and the compiler’s assumptions .
c. Options, clobbers, and compiler cooperation
The final argument to asm! is a set of options that modify how the compiler treats the block. The most important are pure, nomem, and nostack. A pure block has no side effects beyond its outputs: the compiler can move it, duplicate it, or eliminate it if the outputs are unused. nomem declares that the assembly does not read or write memory, which allows the compiler to reorder memory operations across the block. nostack declares that the assembly does not touch the stack, which enables certain optimizations around stack alignment .
// A constant-time select using cmov.
// pure + nomem + nostack tell the compiler this block is side-effect-free
// and touches no memory, so it can be scheduled freely.
#[inline(always)]
pub fn ct_select_u8(a: u8, b: u8, condition: u8) -> u8 {
let result: u64;
unsafe {
asm!(
"test {cond:e}, {cond:e}", // set ZF if condition == 0
"cmovne {out:e}, {a:e}", // if ZF == 0, out = a; else out stays b
cond = in(reg) condition as u32,
a = in(reg) a as u32,
out = inout(reg) b as u64 => result,
options(pure, nomem, nostack),
);
}
result as u8
}This function exists because the pure-Rust equivalent—if condition { a } else { b } or a bit-twiddling select—can be transformed by LLVM into a conditional branch or a pointer-based load. The pointer variant is particularly dangerous in cryptographic code because the address depends on the secret condition, creating a cache-timing side channel. Inline assembly is opaque to LLVM: the cmovne instruction stays exactly as written, and the address never depends on the secret .
If the assembly modifies memory that the compiler does not know about, the nomem option must be omitted, and any memory that is read or written should be passed as a pointer operand. If the assembly changes the condition code register (the flags), that is implicit in most instructions and does not need a separate declaration, but if the assembly leaves flags in a state that the surrounding code does not expect, the preserves_flags option is not appropriate—the compiler will assume flags are clobbered by default. The safest approach is to read the Rust reference for each option and understand exactly what guarantee it provides.
Complete Example Session
// ============================================
// PART 1: THE SETUP
// ============================================
// A constant-time comparison is the canonical example of inline assembly
// for security. The goal is to compare two byte slices without branching,
// so that timing does not leak information about where they differ.
use std::arch::asm;
// ============================================
// PART 2: THE COMPARISON PRIMITIVE
// ============================================
// XOR the bytes and OR the results. If any byte differs, the OR is nonzero.
// The loop is written in assembly to prevent the compiler from
// introducing a branch or a vectorized comparison with different timing.
fn ct_eq_bytes(a: &[u8], b: &[u8]) -> bool {
assert_eq!(a.len(), b.len());
let mut acc: u8 = 0;
for (&x, &y) in a.iter().zip(b.iter()) {
let diff: u8;
unsafe {
asm!(
"xor {d}, {x}", // d = x ^ y
"or {a}, {d}", // acc |= d
x = in(reg) x,
d = lateout(reg) diff, // diff is written after x is read
a = inout(reg) acc, // acc accumulates differences
);
}
}
acc == 0
}
// ============================================
// PART 3: THE TIMESTAMP COUNTER
// ============================================
// The rdtsc instruction reads the CPU's cycle counter.
// There is no portable intrinsic for this on all targets.
fn read_tsc() -> u64 {
let lo: u32;
let hi: u32;
unsafe {
asm!(
"rdtsc",
out("eax") lo, // low 32 bits of TSC
out("edx") hi, // high 32 bits of TSC
options(nostack, nomem, preserves_flags),
);
}
((hi as u64) << 32) | (lo as u64)
}
// ============================================
// PART 4: THE MEMORY BARRIER
// ============================================
// A compiler fence prevents reordering, but a hardware fence
// prevents the CPU from reordering loads and stores.
fn hardware_fence() {
unsafe {
asm!("mfence", options(nostack, preserves_flags));
}
}
// ============================================
// PART 5: THE PORTABLE FALLBACK
// ============================================
// Any asm! block must be gated by target_arch,
// with a pure-Rust path for other architectures.
#[cfg(target_arch = "x86_64")]
fn fast_path(x: u64) -> u64 {
unsafe {
asm!("add {0}, 1", inout(reg) x)
}
}
#[cfg(not(target_arch = "x86_64"))]
fn fast_path(x: u64) -> u64 {
x + 1
}
// ============================================
// PART 6: THE CLOBBER EXAMPLE
// ============================================
// When an instruction modifies a register that is not an output,
// declare it as a clobber with `out(reg) _`.
fn cpu_serial() -> (u32, u32, u32, u32) {
let (a, b, c, d): (u32, u32, u32, u32);
unsafe {
asm!(
"cpuid",
inout("eax") 0 => a, // leaf 0, output in eax
out("ebx") b, // output in ebx
out("ecx") c, // output in ecx
out("edx") d, // output in edx
options(nostack),
);
}
(a, b, c, d)
}
// ============================================
// PART 7: THE EXPLICIT REGISTER CONSTRAINT
// ============================================
// Some instructions require operands in specific registers.
// The "shl" instruction on x86-64 uses cl for variable shifts.
fn shift_left(value: u64, amount: u8) -> u64 {
let result: u64;
unsafe {
asm!(
"shl {val}, cl",
val = inout(reg) value => result,
in("cl") amount,
options(pure, nomem, nostack, preserves_flags),
);
}
result
}
// ============================================
// PART 8: THE CONST OPERAND
// ============================================
// The `const` operand embeds a compile-time constant directly
// into the assembly template. This is useful for immediate values.
fn increment_by_constant(x: u64) -> u64 {
let result: u64;
unsafe {
asm!(
"add {0}, {1}",
inout(reg) x => result,
const 42, // the constant 42 is formatted into the template
options(pure, nomem, nostack, preserves_flags),
);
}
result
}
// ============================================
// PART 9: THE SYM OPERAND
// ============================================
// The `sym` operand substitutes a function or static's symbol name.
// This is used for indirect calls or referencing global data.
static GLOBAL: u64 = 0xdeadbeef;
fn read_global() -> u64 {
let result: u64;
unsafe {
asm!(
"mov {0}, qword ptr [{1}]",
out(reg) result,
sym GLOBAL,
options(nostack, readonly),
);
}
result
}
// ============================================
// PART 10: THE FULL PICTURE
// ============================================
// Inline assembly is not a replacement for Rust's optimizer.
// It is a tool for the narrow cases where the optimizer's
// assumptions are wrong or the operation has no Rust equivalent.
// Every asm! block is a promise: the programmer promises
// correctness that the compiler cannot verify.
fn main() {
let a = [1u8, 2, 3];
let b = [1u8, 2, 3];
assert!(ct_eq_bytes(&a, &b));
let _tsc = read_tsc();
hardware_fence();
let (max_leaf, _, _, _) = cpu_serial();
println!("max cpuid leaf: {}", max_leaf);
}The ten parts build a small library of inline assembly patterns: a constant-time comparison loop, a timestamp read, a hardware fence, a CPUID query, and the operand forms that make each work. The point is not that every program needs these—most do not—but that the shapes are representative of the real uses of asm! in Rust.
Quick Reference
Operand Constraints
| Constraint | Meaning | Register Reuse |
|---|---|---|
in(reg) | Read-only input | N/A |
out(reg) | Write-only output | Cannot share with inputs |
lateout(reg) | Written after all inputs read | Can share with inputs |
inout(reg) | Read and written | Dedicated register |
inlateout(reg) | Read and written, late write | Can share with inputs |
Options
| Option | Guarantee | When to Use |
|---|---|---|
pure | No side effects, outputs only | Pure computation |
nomem | No memory access | Register-only operations |
nostack | No stack manipulation | Leaf operations |
preserves_flags | Flags unchanged | Simple arithmetic on x86 |
readonly | Reads memory, does not write | Load-only operations |
Common x86-64 Instructions
| Instruction | Purpose | Registers |
|---|---|---|
rdtsc | Read timestamp counter | eax, edx |
cpuid | CPU identification | eax, ebx, ecx, edx |
mfence | Full memory fence | None |
cmovne | Conditional move | Any GP register |
shl | Shift left | cl for variable amount |
Target Gating
| Pattern | Example |
|---|---|
| Architecture gate | #[cfg(target_arch = "x86_64")] |
| Feature gate | #[cfg(target_feature = "avx2")] |
| Portable fallback | #[cfg(not(target_arch = "x86_64"))] |
Best Practices
✅ Do This:
// Gate every asm block by architecture.
#[cfg(target_arch = "x86_64")] // ✅
unsafe { asm!("nop"); }
// Use inout when the same value is read and written.
asm!("add {0}, 1", inout(reg) x); // ✅
// Use lateout when the output is written only after inputs are read.
asm!("mov {0}, {1}", lateout(reg) out, in(reg) inp); // ✅
// Declare discarded outputs with _ to inform the compiler.
asm!("cpuid", inout("eax") 0 => _, out("ebx") _); // ✅
// Add options that describe the block's behavior.
options(pure, nomem, nostack) // ✅
// Provide a pure-Rust fallback for other architectures.
#[cfg(not(target_arch = "x86_64"))] // ✅
fn fallback() { /* portable code */ }
// Use explicit registers only when the instruction requires them.
asm!("out 0x64, al", in("al") cmd); // ✅❌ Don’t Do This:
// Don't use asm! without an unsafe block.
asm!("nop"); // ❌
// Don't use inlateout when the output is written before inputs are read.
asm!("add {0}, {1}", inlateout(reg) a, in(reg) b); // ❌
// Don't forget to declare clobbered registers.
asm!("cpuid"); // ❌
// Don't use asm! on unsupported targets without a fallback.
#[cfg(target_arch = "aarch64")] // ❌
unsafe { asm!("x86 instruction"); }
// Don't assume the compiler will optimize around asm! the same way.
asm!("add {0}, 1", inout(reg) x); // then expect LLVM to vectorize // ❌
// Don't use `reg` for registers the compiler reserves.
asm!("mov ebx, 0", out("ebx") _); // ❌ on some targets
// Don't omit options when the block is pure.
asm!("add {0}, {1}", inout(reg) x, in(reg) y); // no options // ❌Common Pitfalls
| Pitfall | Why It Happens | Fix |
|---|---|---|
| Wrong result in release but not debug | inlateout aliases input and output registers under optimization | Use inout when output is written before inputs are read |
| Compiler corruption of reserved registers | reg class includes registers LLVM assumes it owns (ebx on x86-64) | Save and restore the register manually, or use explicit constraints |
| Assembly block reordered or eliminated | Missing pure or nomem options lets compiler move side-effecting code | Declare options accurately; omit pure if side effects exist |
| Side channel reintroduced | Pure Rust constant-time pattern optimized back into a branch | Use asm! with cmov or bit operations; LLVM cannot rewrite it |
| Linker error on symbol | sym operand references a private symbol | Ensure the symbol is pub or #[no_mangle] |
| Stack corruption | nostack declared but assembly pushes to stack | Remove nostack if the assembly modifies rsp |
| Flags unexpectedly clobbered | Instruction modifies condition codes without declaration | The compiler assumes flags are clobbered by default; no action needed unless preserves_flags was wrongly used |
Real-World Examples
1. Constant-Time Select
// cmovne executes the same instructions regardless of condition.
asm!("test {c}, {c}", "cmovne {o}, {a}", c = in(reg) cond, a = in(reg) x, o = inout(reg) y => out);2. Read Timestamp Counter
// rdtsc returns the cycle counter in edx:eax.
asm!("rdtsc", out("eax") lo, out("edx") hi);3. CPU Feature Detection
// cpuid leaf 7, subleaf 0 reports AVX2 in ebx bit 5.
asm!("cpuid", inout("eax") 7 => _, inout("ecx") 0 => _, out("ebx") ebx, out("edx") _);
let has_avx2 = (ebx & (1 << 5)) != 0;4. Hardware Memory Fence
// mfence ensures all prior stores are visible before subsequent loads.
asm!("mfence", options(nostack, preserves_flags));5. Variable Shift
// The shift amount must be in cl on x86-64.
asm!("shl {v}, cl", v = inout(reg) value => result, in("cl") amount);6. Compiler Fence
// A compiler-only fence with no hardware instruction.
asm!("", options(nomem, nostack, preserves_flags));7. Read the Stack Pointer
// rsp holds the current stack pointer.
asm!("mov {0}, rsp", out(reg) sp);8. Invalidate Cache Line
// clflush flushes a cache line containing the given address.
asm!("clflush [{0}]", in(reg) ptr, options(nostack));9. Debug Breakpoint
// int3 triggers a breakpoint for debuggers.
asm!("int3", options(nostack));10. Halt the CPU
// hlt stops the processor until the next interrupt.
asm!("hlt", options(nostack, nomem));Visual
The Register Allocator’s View
┌─────────────────────────────────────────────────────────┐
│ BEFORE asm! BLOCK │
│ │
│ Rust variables: x = 42, y = 7 │
│ Compiler assigns: rax ← x, rbx ← y │
│ │
│ ┌───────────────────────────────────────────────────┐ │
│ │ asm!("add {0}, {1}", inout(reg) x, in(reg) y) │ │
│ │ │ │
│ │ inout(reg) x → rax (read and written) │ │
│ │ in(reg) y → rbx (read only) │ │
│ │ │ │
│ │ The compiler guarantees rax ≠ rbx because │ │
│ │ inout cannot share with any input. │ │
│ └───────────────────────────────────────────────────┘ │
│ │
│ AFTER: x ← rax (49), y ← rbx (still 7) │
└─────────────────────────────────────────────────────────┘The inlateout Aliasing Problem
┌─────────────────────────────────────────────────────────┐
│ WITH inlateout │
│ │
│ asm!("add {0}, {2}", inlateout(reg) a, in(reg) b, in(reg) c)│
│ │
│ Compiler sees: c and b have the same value (both 2). │
│ It may assign: a → rcx, c → rcx (reuse!) │
│ │
│ Execution: │
│ add rcx, rcx ; rcx = 4 (c was 2, now 4) │
│ add rcx, rbx ; rcx = 6 (but expected 3+2+2=7?) │
│ │
│ The output is corrupted because c was overwritten │
│ before it was read by the second add. │
│ │
│ FIX: use inout(reg) a, which forces a dedicated register│
└─────────────────────────────────────────────────────────┘The Opacity Boundary
┌─────────────────────────────────────────────────────────┐
│ RUST / LLVM WORLD │
│ │
│ ┌───────────────────────────────────────────────────┐ │
│ │ LLVM IR: %x = add i64 %a, %b │ │
│ │ Optimizer: "I can vectorize this, reorder it, │ │
│ │ or eliminate it if unused." │ │
│ └───────────────────────────────────────────────────┘ │
│ │
│ ┌───────────────────────────────────────────────────┐ │
│ │ asm!("add {0}, {1}", inout(reg) a, in(reg) b) │ │
│ │ Optimizer: "This is a black box. I know the │ │
│ │ inputs and outputs, but not the │ │
│ │ instructions. I cannot rewrite it." │ │
│ └───────────────────────────────────────────────────┘ │
│ │
│ The second block executes exactly as written. │
│ That is the guarantee and the cost. │
└─────────────────────────────────────────────────────────┘Architecture Gating
┌─────────────────────────────────────────────────────────┐
│ src/lib.rs │
│ │
│ #[cfg(target_arch = "x86_64")] │
│ mod x86_impl { │
│ pub fn fast() -> u64 { │
│ unsafe { asm!("...") } │
│ } │
│ } │
│ │
│ #[cfg(target_arch = "aarch64")] │
│ mod arm_impl { │
│ pub fn fast() -> u64 { │
│ unsafe { asm!("...") } │
│ } │
│ } │
│ │
│ #[cfg(not(any(target_arch = "x86_64", │
│ target_arch = "aarch64")))] │
│ mod portable { │
│ pub fn fast() -> u64 { │
│ portable_implementation() │
│ } │
│ } │
│ │
│ The same public API, three implementations. │
└─────────────────────────────────────────────────────────┘Summary
| Item | Value |
|---|---|
| Macro | asm! from std::arch or core::arch |
| Safety | Always requires unsafe |
| Stability | Stable since Rust 1.59 on supported architectures |
| Primary use | Accessing instructions with no Rust intrinsic |
| Key risk | Compiler cannot verify correctness |
| Register class | reg lets compiler choose; explicit names pin |
| Late outputs | lateout / inlateout allow register reuse |
| Options | pure, nomem, nostack describe behavior |
| Portability | Must be gated by target_arch with fallback |
| Alternative | Intrinsics (std::arch) are usually safer |
Key takeaways:
- Inline assembly is an escape hatch, not a default. Reach for it when an intrinsic does not exist and the operation cannot be expressed portably.
inoutis safer thaninlateout. The register-reuse optimization is only correct when the output is written after all inputs are read.- Clobbers must be declared. Any register the assembly modifies without an output binding should be listed with
out(reg) _. - Options are promises.
nomemandpuretell the compiler it can optimize around the block; breaking that promise causes undefined behavior. - Explicit registers require explicit care. Reserved registers like
ebxon x86-64 must be saved and restored manually if the instruction requires them. - Measurement is mandatory. Assembly that looks faster may be slower if it breaks a dependency chain the compiler was exploiting .
- Every block needs a fallback. A library with inline assembly must compile on architectures that do not support it, or gate the entire module behind
target_arch. - The optimizer is blind inside
asm!. That blindness prevents harmful transformations (constant-time code) and helpful ones (vectorization) alike. MaybeUninitis supported in operands. For uninitialized memory operations, the operand types includeMaybeUninitwrappers since a 2023 compiler change .- The
symoperand links symbols. It substitutes a function or static’s mangled name into the template, useful for indirect calls and global data access.
Remember: Inline assembly is the boundary between Rust’s safety guarantees and the raw machine. The macro does not make the machine safe; it makes the programmer responsible for the machine’s behavior. Every asm! block is a declaration that the compiler’s abstractions are insufficient for this specific operation, and that the programmer has taken on the burden of proving correctness at the instruction level. Use it sparingly, gate it carefully, measure it honestly, and always leave a portable path for the architectures you cannot test.
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